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C++ Programming
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Memory Management Static and Dynamic Translation The Address Translation Concept Base / Limit Registers and Contiguous Programs Dynamic Linking Memory Fragmentation Non-contiguous Program Memory

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Agenda 4/2

Memory Management

Static and Dynamic Translation The Address Translation Concept

Base / Limit Registers and Contiguous Programs Dynamic Linking

Memory Fragmentation

Non-contiguous Program Memory

Static Relocation

Dynamic Relocation – relocation at run-time

Start with the linker produced load module

Multiple Programs Without Memory Abstraction

  • Illustration of the relocation Two Programs

Dynamic relocation using a relocation register

 

Base and Limit Registers

—Base and limit registers can be used to give each process a separate address space

  • Addresses referenced in the program (virtual addresses) are offset by the contents of the base

 

program with separate modules, different RR point to the code (CR), the static data (DR), and the dynamic data (FR).

 

Main Points of Address Translation

•    Address Translation Concept

•     How do we convert a virtual address to a physical address?

  • Flexible Address Translation

    • Base and Limit [limitations?]

    • Paging

    • Segmentation

    • Multilevel translation

  • Efficient Address Translation: what we need for good performance

    • Translation Lookaside Buffers (TLB)

    • Virtually and Physically Addressed Caches

 

Address Translation Concept

Physical Memory

 

Memory Management Unit  

Translation Box

yes

Physical Address

Virtual Address

ok?

no

raise exception

Instruction fetch or data read/write (untranslated)

Hardware Support for Relocation and Limit Registers

Relocation Register ó Base Register

•    Multiple-partition allocation

•      Hole – block of available memory; holes of various size are scattered throughout memory

  • When a process arrives, it is allocated memory from a hole large enough to accommodate it

  • Operating system maintains information about:

    1. allocated partitions b) free partitions (hole)

Main memory usually split into two partitions:

Resident operating system, usually held in low memory with interrupt vector (& ISRs)

User processes then held in high memory

Contiguous Allocation

 

•      Basic Machine Operation

loop

w:= M[pc];

oc:= Opcode(w); adr:= Address(w); pc:= pc +1;

case oc of

1: reg: = reg +M[adr]; 2: M[adr]:= reg;

3: pc: = adr;

end end

M[0…n] main memory reg         general register pc     Program counter

Address(w)    gets operand address of instruction w

Opcode(w)    gets opcode part of instruction w

oc = 1      Add

oc = 2       store

oc = 3       branch

Introduction to Dynamic Relocation Virtual = Physical Addresses

  • Machine Operation Modified for Dynamic Relocation

loop

w:= M[NL_map(pc)]; oc:= Opcode(w); adr:= Address(w); pc:= pc +1;

case oc of

1: reg: = reg +M[NL_map(adr)]; 2: M[NL_map(adr)]:= reg;

3: pc: = adr; end

End

With dynamic Relocation Hardware: addresses pc and adr are treated as relocatable (virtual) addresses and mapped into main storage.

Generalized Mapping function: NL_MAP (name - location map)

NL_Map{relocatable(virtual) addresses}

→ {real storage addresses}

Using Simple Relocation/Limit mapping

PC & Relocation Register (RR)/Limit R need to be part of PCB

Dynamic Relocation

Dynamic Linking

•      Linking postponed until execution time

  • Small piece of code, stub, used to locate the appropriate memory-resident library routine

  • Stub replaces itself with the address of the routine, and executes the routine

  • Operating system needed to check if routine is in processesʼ memory address

  • Dynamic linking is particularly useful for libraries

•    a table of valid entry points for the library functions is kept by the compiler.

  • When the program calls into the library, the program indirects through the table

  • System also known as shared libraries

Code reaches a call to f. f not in memory, replaced by a stub @ link time. Dynamically load f code to memory and call it.

When q's STUB is executed, the loader finds out that f is already memory. The STUB is replaced by a call and control is transferred to f, which is now shared by p and q.

 

Memory Fragmentation

  • External Fragmentation – total memory space exists to satisfy a request for memory, but it is not contiguous

•      Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition or allocation, but not being used

  • Reduce external fragmentation by compaction

    • Shuffle memory contents to place all free memory together in one large block

    • Compaction is possible only if relocation is dynamic, and is done at execution time

    • I/O problem

      • Latch job in memory while it is involved in I/O

      • Do I/O only into OS buffers

 

 

External => External to processes

 

Logical Addresses, Physical Addresses, and Address Translation

Non-Contiguous Memory Allocation

 

—Logical address: address of an instruction or data byte as used in a process by the CPU

  • Can Be Viewed as a pair (compi, bytei)

—Physical address: address in memory where an instruction or data byte exists

 

Approaches to Noncontiguous Memory Allocation

—Two approaches:

  • Paging

    • Process consists of fixed-size components called pages (frames)

    • Page is a contiguous sequence of bytes

    • Eliminates external fragmentation

    • The frame (page) size is defined by hardware

  • Segmentation

    • Programmer identifies logical entities in a program; each is called a

segment and is a contiguous set of bytes

  • Facilitates sharing of code, data, and program modules between processes

—Hybrid approach: segmentation with paging

◦      Avoids external fragmentation

 

  • Paging is a particular implementation of Virtual Memory

    • Divide real memory into a number of equal-sized contiguous blocks or page frames (f0, f1, …, fn)

      • g., 512, 1024 bytes per block

      • Physical memory address is then a pair <f, w> frame #, word offset

      • When the physical address is a string of k bits (2k addressable words)

        • 1st n bits form the frame number and m = k-n bits are the word offset

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